The present invention relates to a semiconductor device and a manufacturing method thereof, and particularly to a semiconductor which includes a heterojunction and a manufacturing method thereof.
It is known MOSFET which is made up of silicon carbide as a material as a related art of the invention. With regard to the MOSFET disclosed in Japanese Laid-open Patent Publication No. Hei 10-233503, an n− type drain region is formed on an n+ type silicon carbide substrate region. On the surface of the drain region, a P type well region (a base region) and an n+ type source region are formed. A gate electrode is arranged on the drain region with a gate insulating film placed in-between. A source electrode is formed in a way that the source electrode is arranged adjacent to the well region and the source region. Additionally, a drain electrode is formed on the rear of the silicon carbide substrate region.
The following discussion will provide an overview of operations of this MOSFET. For example, in a case that the gate electrode is grounded or applied with negative potential while the source electrode is grounded and the drain electrode is applied with positive potential, the drain region and the well region are put into a state of being reverse biased, and accordingly current is cut off in the device. Then, if the gate electrode is applied with adequate positive potential, an inversion type channel region is formed on an interface of the gate region which is opposite to the gate electrode. Hereby, since electrons flow into the drain region from the source region through the channel region, current runs from the drain electrode to the source electrode. In this manner, the MOSFET of the related art includes a switching function.